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NXP (Philips) LPC2104/5/6 microcontroller family

How to configure the Secondary JTAG in LPC2104/5/6

Introduction

Before examining the secondary JTAG let’s take a look at the LPC210x debug mode. Debug pins (JTAG and ETM) are enabled by using the DBGSEL and RTCLK pins. If DBGSEL is configured high on the rising edge of the CPU reset then pins P0.17-P0.31 are configured as debug pins. The RTCK pin must be high as the reset is released. The ARM7TDMI-S Debug Architecture uses the JTAG port along with the EmbeddedICE debug logic to provide on-chip debug support.

When JTAG and ETM are enabled, port pins P0.17-P0.31 are not useable by the application. The Primary JTAG interface uses pins P0.17-P0.21 and pins P0.22-P0.31 are used by the ETM (Embedded Trace Macrocell). The user may wish to debug the application using Primary JTAG only, but even then the bottom 10 port pins are not useable by the application.

The Secondary JTAG interface is provided to free the ETM pins for use as port pins when tracing is not required. Under this interface user can debug the application and can have 10 additional port pins for the application, which would otherwise be used by the ETM. However, in this case the port pins used by the secondary JTAG interface will be pins P0.27-P0.31, which implies that all the remaining port pins from P0.0-P0.26 are useable by the application.

How to configure the Secondary JTAG in LPC210x

For configuring the secondary JTAG interface, the user needs to run a simple application from Flash on reset. This application has to be part of the application under debug if it resides in the flash. The Debug Select (DEBSEL) pin should also be held low during reset. The application will map the bottom 5 port pins to alternate function 1, which is the secondary JTAG. Please refer to the Pin Configuration chapter in the LPC210x User Manual where the port pins P0.27-P0.31 are shown to be configurable to alternate function1. Since this application runs on reset hence you can’t switch to secondary JTAG in the same debug session.

Steps on how to switch to secondary JTAG are as follows:

Load the application in Flash using the software debugger. You can also initially load your application using an ISP utility provided by some of our tool partners or by Philips itself and then switch to the software debugger after reset.

Close the debugger. Remove the primary JTAG jumper and place it on the Secondary JTAG jumper on the evaluation board (Your evaluation board needs to support this interface). This step is not required if the ISP utility is used.

Reset the part. The DEBSEL pin should be held low during the reset, which prevents the entry into Primary JTAG mode.

If you have the correct signature at 0x14(More information in the Flash Memory System and Programming chapter in the LPC210x User Manual) then user application will run and the port pins P0.27-P0.31 will be configured to secondary JTAG. The Philips Flash-programming tool handles the signature generation automatically. User should then be able to debug the application using the secondary JTAG interface.

Software Example for configuring Secondary JTAG

The application that runs from flash at reset is provided in assembly and C. Please bear in mind that you should branch to this code from 0x0. For this to happen be sure that your interrupt vectors reside from 0x00-0x1C and the signature resides at 0x14.The signature will be the 2’s complement of the checksum of the remaining interrupt vectors. The boot loader can then decide whether there is valid user code residing in the flash. If the signature matches then the execution control is transferred to the user code and the program counter is loaded with 0x0. For detailed information please refer to the Flash Memory System and Programming in the LPC210x User Manual.

General Assembly code:

;----------------------------------------------------------;
Interrupt vectors (0x00-0x1C) with signature

; residing at 0x14

;----------------------------------------------------------

LDR PC, =start ; Jump to start of assembly

; code. This should be

; located at 0x0.This

; instruction will be

; followed by other interrupt ; vectors

;----------------------------------------------------------

; Main Assembly code

;----------------------------------------------------------

start

LDR SP=0x4000F000 ; Set the Stack pointer for

; the Supervisor mode

LDR R0, JTAG2 ; Load R0 with 0x55400000

LDR R1, PINSEL1 ; Load R1 with 0xE002C004

STR R0, [R1] ;Load PINSEL1 with 0x55400000

;----------------------------------------------------------

; Allocate words in memory and assign values

;----------------------------------------------------------

JTAG2

DCD 0x55400000

PINSEL1

DCD 0xE002C004

END

You will have to modify this code depending upon the assembler you are using. In general, at 0x0 you should have a branch to the assembly routine, which must reside in Flash. You then simply load the SFR PINSEL1 with 0x55400000, which maps the pins P0.27-P0.31 to alternate function 1.

Startup assembly code at 0x0:

LDR PC, =__main // Jump to C code. This

// should be located at 0x0. // This instruction will be // followed by the interrupt // vectors

General C code:

#define PINSEL1 (*((volatile unsigned int *)0xE002C004))

int main()

{

PINSEL1=0x55400000; // Configure Pins P0.27-P0.31 // to alternate function 1

// which sets up the

// secondary JTAG

}

Again you will have to modify the code, depending upon the compiler you are using. From 0x0 jump to C main () and then load the SFR PINSEL1 with 0x55400000.

Concluding statements

Combination of (DEBSEL+ RTCLK) pins takes the microcontroller into debug mode and configures port pins P0.17-P0.31 as debug pins. If you wish to debug only through JTAG use the secondary JTAG interface (Port pins P0.27-P0.31) by running a simple application from Flash. Hardware support is needed to use the Secondary JTAG interface.